Sciweavers

DAC
2002
ACM
16 years 7 months ago
A universal technique for fast and flexible instruction-set architecture simulation
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance ...
Achim Nohl, Gunnar Braun, Oliver Schliebusch, Rain...
DAC
2002
ACM
16 years 7 months ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan
DAC
2002
ACM
16 years 7 months ago
A flexible accelerator for layer 7 networking applications
In this paper, we present a flexible accelerator designed for networking applications. The accelerator can be utilized efficiently by a variety of Network Processor designs. Most ...
Gokhan Memik, William H. Mangione-Smith
DAC
2002
ACM
16 years 7 months ago
Watermarking integer linear programming solutions
Linear programming (LP) in its many forms has proven to be an indispensable tool for expressing and solving optimization problems in numerous domains. We propose the first set of ...
Seapahn Megerian, Milenko Drinic, Miodrag Potkonja...
116
Voted
DAC
2002
ACM
16 years 7 months ago
Challenges and opportunities in electronic textiles modeling and optimization
Diana Marculescu, Radu Marculescu, Pradeep K. Khos...
DAC
2002
ACM
16 years 7 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
DAC
2002
ACM
16 years 7 months ago
A solenoidal basis method for efficient inductance extraction
The ability to compute the parasitic inductance of the interconnect is critical to the timing verification of modern VLSI circuits. A challenging aspect of inductance extraction i...
Hemant Mahawar, Vivek Sarin, Weiping Shi
134
Voted
DAC
2002
ACM
16 years 7 months ago
Enhancing test efficiency for delay fault testing using multiple-clocked schemes
Jing-Jia Liou, Li-C. Wang, Kwang-Ting Cheng, Jenni...
DAC
2002
ACM
16 years 7 months ago
False-path-aware statistical timing analysis and efficient path selection for delay testing and timing validation
We propose a false-path-aware statistical timing analysis framework. In our framework, cell as well as interconnect delays are assumed to be correlated random variables. Our tool ...
Jing-Jia Liou, Angela Krstic, Li-C. Wang, Kwang-Ti...