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DATE
2000
IEEE
105views Hardware» more  DATE 2000»
13 years 12 months ago
Yield Improvement and Repair Trade-Off for Large Embedded Memories
In this paper, we give an overview of the trade-off to improve yield and optimize silicon manufacturing cost. The specific technology focus is on large embedded memories in comple...
Yervant Zorian
DAC
2001
ACM
14 years 8 months ago
Testing for Interconnect Crosstalk Defects Using On-Chip Embedded Processor Cores
Crosstalk effects degrade the integrity of signals traveling on long interconnects and must be addressed during manufacturing testing. External testing for crosstalk is expensive ...
Li Chen, Xiaoliang Bai, Sujit Dey
ICCD
2004
IEEE
132views Hardware» more  ICCD 2004»
14 years 4 months ago
Compressed Embedded Diagnosis of Logic Cores
This paper introduces a new method for deterministic diagnosis of logic cores. The proposed method is based on onchip decompression and comparison of incompletely specified test ...
Scott Ollivierre, Adam B. Kinsman, Nicola Nicolici
DATE
2005
IEEE
235views Hardware» more  DATE 2005»
14 years 1 months ago
Challenges in Embedded Memory Design and Test
Both the number of embedded memories, as well as the total embedded memory content in our chips is growing steadily. Time for chip designers, EDA makers, and test engineers to upd...
Erik Jan Marinissen, Betty Prince, Doris Keitel-Sc...
DFT
2002
IEEE
128views VLSI» more  DFT 2002»
14 years 14 days ago
Matrix-Based Test Vector Decompression Using an Embedded Processor
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
Kedarnath J. Balakrishnan, Nur A. Touba