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    ICCAD
    2000
    IEEE
    100views Hardware» more  ICCAD 2000»
    Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
    15 years 7 months ago
    Partial Simulation-Driven ATPG for Detection and Diagnosis of Faults in Analog Circuits
    Download  www.cs.york.ac.uk
    In this paper, we propose a novel fault-oriented test generation methodology for detection and isolation of faults in analog circuits. Given the description of the circuit-underte...
    Sudip Chakrabarti, Abhijit Chatterjee
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    DATE
    2008
    IEEE
    76views Hardware» more  DATE 2008»
    On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits
    15 years 9 months ago
    On Modeling and Testing of Lithography Related Open Faults in Nano-CMOS Circuits
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    Aswin Sreedhar, Alodeep Sanyal, Sandip Kundu
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    DATE
    2003
    IEEE
    73views Hardware» more  DATE 2003»
    Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG
    15 years 8 months ago
    Test Generation for Acyclic Sequential Circuits with Single Stuck-at Fault Combinational ATPG
    Download  www.date-conference.com
    Hideyuki Ichihara, Tomoo Inoue
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    ITC
    2002
    IEEE
    133views Hardware» more  ITC 2002»
    A DFT Technique for Low Frequency Delay Fault Testing in High Performance Digital Circuits
    15 years 7 months ago
    A DFT Technique for Low Frequency Delay Fault Testing in High Performance Digital Circuits
    Download  www.ece.uwaterloo.ca
    Bhaskar Chatterjee, Manoj Sachdev, Ali Keshavarzi
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    109
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    VLSID
    1995
    IEEE
    112views VLSI» more  VLSID 1995»
    An efficient automatic test generation system for path delay faults in combinational circuits
    15 years 6 months ago
    An efficient automatic test generation system for path delay faults in combinational circuits
    Download  eprints.iisc.ernet.in
    Ananta K. Majhi, James Jacob, Lalit M. Patnaik, Vi...
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