GLVLSI
2010
IEEE
14 years 4 months ago
2010
IEEE
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
We introduce a simple hierarchical design technique for using dynamic domino circuits to build high-performance self-timed data path circuits. We wrap the dynamic domino circuit i...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
In this paper, we present a clustering based algorithm for acyclic multi-way partitioning. Many existing partitioning algorithms have shown that clustering can effectively improv...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
We present a unique FPGA that uses a mix of digital and large-signal analog computation for the simulation of gene regulatory networks. The prototype IC consists of a 4x5 array of...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
In this work we ask the fundamental question: How many bits of information can be stored in a crossbar switching network? The answer is trivial when the switches of the network ar...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...
GLVLSI
2003
IEEE
14 years 4 months ago
2003
IEEE
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...