Sciweavers

DATE
2009
IEEE
248views Hardware» more  DATE 2009»
14 years 3 months ago
KAST: K-associative sector translation for NAND flash memory in real-time systems
Abstract—Flash memory is a good candidate for the storage device in real-time systems due to its non-fluctuating performance, low power consumption and high shock resistance. Ho...
Hyun-jin Cho, Dongkun Shin, Young Ik Eom
DATE
2009
IEEE
148views Hardware» more  DATE 2009»
14 years 3 months ago
A new design-for-test technique for SRAM core-cell stability faults
—Core-cell stability represents the ability of the core-cell to keep the stored data. With the rapid development of semiconductor memories, their test is becoming a major concern...
Alexandre Ney, Luigi Dilillo, Patrick Girard, Serg...
DATE
2009
IEEE
134views Hardware» more  DATE 2009»
14 years 3 months ago
Buffer minimization of real-time streaming applications scheduling on hybrid CPU/FPGA architectures
We address the problem of real-time streaming applications scheduling on hybrid CPU/FPGA architectures. The main contribution is a two-step approach to minimize the buffer require...
Jun Zhu, Ingo Sander, Axel Jantsch
DATE
2009
IEEE
78views Hardware» more  DATE 2009»
14 years 3 months ago
QC-Fill: An X-Fill method for quick-and-cool scan test
— In this paper, we present an X-Fill (QC-Fill) method for not only slashing the test time but also reducing the test power (including both capture power and shifting power). QC-...
Chao-Wen Tzeng, Shi-Yu Huang
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
14 years 3 months ago
A set-based mapping strategy for flash-memory reliability enhancement
—With wide applicability of flash memory in various application domains, reliability has become a very critical issue. This research is motivated by the needs to resolve the lif...
Yuan-Sheng Chu, Jen-Wei Hsieh, Yuan-Hao Chang, Tei...
DATE
2009
IEEE
126views Hardware» more  DATE 2009»
14 years 3 months ago
Fast and accurate protocol specific bus modeling using TLM 2.0
—The need to have Transaction Level models early in the design cycle is becoming more and more important to shorten the development times of complex Systems-on-Chip (SoC). These ...
H. W. M. van Moll, Henk Corporaal, Víctor R...
DATE
2009
IEEE
146views Hardware» more  DATE 2009»
14 years 3 months ago
Heterogeneous multi-core platform for consumer multimedia applications
—This paper presents a multi-core SoC architecture for consumer multimedia applications. The comprehensive functionality of such multimedia systems is described using the example...
Peter Kollig, Colin Osborne, Tomas Henriksson
DATE
2009
IEEE
135views Hardware» more  DATE 2009»
14 years 3 months ago
Heterogeneous coarse-grained processing elements: A template architecture for embedded processing acceleration
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
Giovanni Ansaloni, Paolo Bonzini, Laura Pozzi