Sciweavers

DATE
2009
IEEE
155views Hardware» more  DATE 2009»
14 years 4 months ago
Using non-volatile memory to save energy in servers
Abstract—Recent breakthroughs in circuit and process technology have enabled new usage models for non-volatile memory technologies such as Flash and phase change RAM (PCRAM) in t...
David Roberts, Taeho Kgil, Trevor N. Mudge
DATE
2009
IEEE
156views Hardware» more  DATE 2009»
14 years 4 months ago
Implementation of a reduced-lattice MIMO detector for OFDM Systems
—This paper presents a novel VLSI implementation of a MIMO detector for OFDM systems. The proposed architecture is able to perform both linear MMSE and reduced latticeaided MIMO ...
Josep Soler Garrido, Henning Vetter, Magnus Sandel...
DATE
2009
IEEE
159views Hardware» more  DATE 2009»
14 years 4 months ago
Design and implementation of a database filter for BLAST acceleration
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
Panagiotis Afratis, Constantinos Galanakis, Euripi...
DATE
2009
IEEE
134views Hardware» more  DATE 2009»
14 years 4 months ago
Massively multi-topology sizing of analog integrated circuits
This paper demonstrates a system that performs multiobjective sizing across 100,000 analog circuit topologies simultaneously, with SPICE accuracy. It builds on a previous system, ...
Pieter Palmers, Trent McConaghy, Michiel Steyaert,...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
14 years 4 months ago
Bitstream relocation with local clock domains for partially reconfigurable FPGAs
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
Adam Flynn, Ann Gordon-Ross, Alan D. George
DATE
2009
IEEE
76views Hardware» more  DATE 2009»
14 years 4 months ago
LFSR-based test-data compression with self-stoppable seeds
—The main disadvantage of LFSR-based compression is that it should be usually combined with a constrained ATPG process, and, as a result, it cannot be effectively applied to IP c...
M. Koutsoupia, Emmanouil Kalligeros, Xrysovalantis...
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
14 years 4 months ago
A link arbitration scheme for quality of service in a latency-optimized network-on-chip
Abstract—Networks-on-chip (NoC) for general-purpose multiprocessors require quality of service mechanisms to allow realtime streaming applications to be executed along with laten...
Jonas Diemer, Rolf Ernst
DATE
2009
IEEE
122views Hardware» more  DATE 2009»
14 years 4 months ago
A MILP-based approach to path sensitization of embedded software
—We propose a new methodology based on Mixed Integer Linear Programming (MILP) for determining the input values that will exercise a specified execution path in a program. In or...
José C. Costa, José C. Monteiro
DATE
2009
IEEE
117views Hardware» more  DATE 2009»
14 years 4 months ago
An architecture for secure software defined radio
Chunxiao Li, Anand Raghunathan, Niraj K. Jha
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
14 years 4 months ago
User-centric design space exploration for heterogeneous Network-on-Chip platforms
- In this paper, we present a design methodology for automatic platform generation of future heterogeneous systems where communication happens via the Network-onChip (NoC) approach...
Chen-Ling Chou, Radu Marculescu