Sciweavers

ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 9 months ago
Test-access mechanism optimization for core-based three-dimensional SOCs
— Test-access mechanisms (TAMs) and test wrappers (e.g., the IEEE Standard 1500 wrapper) facilitate the modular testing of embedded cores in a core-based system-on-chip (SOC). Su...
Xiaoxia Wu, Yibo Chen, Krishnendu Chakrabarty, Yua...
ICCD
2008
IEEE
420views Hardware» more  ICCD 2008»
14 years 9 months ago
Frequency and voltage planning for multi-core processors under thermal constraints
— Clock frequency and transistor density increases have resulted in elevated chip temperatures. In order to meet temperature constraints while still exploiting the performance op...
Michael Kadin, Sherief Reda
ICCD
2008
IEEE
117views Hardware» more  ICCD 2008»
14 years 9 months ago
Two dimensional highly associative level-two cache design
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...
Chuanjun Zhang, Bing Xue
ICCD
2008
IEEE
139views Hardware» more  ICCD 2008»
14 years 9 months ago
Probabilistic error propagation in logic circuits using the Boolean difference calculus
- A gate level probabilistic error propagation model is presented which takes as input the Boolean function of the gate, the signal and error probabilities of the gate inputs, and ...
Nasir Mohyuddin, Ehsan Pakbaznia, Massoud Pedram
ICCD
2008
IEEE
151views Hardware» more  ICCD 2008»
14 years 9 months ago
Digital filter synthesis considering multiple adder graphs for a coefficient
—In this paper, a new FIR digital filter synthesis algorithm is proposed to consider multiple adder graphs for a coefficient. The proposed algorithm selects an adder graph that c...
Jeong-Ho Han, In-Cheol Park
ICCD
2008
IEEE
175views Hardware» more  ICCD 2008»
14 years 9 months ago
Contention-aware application mapping for Network-on-Chip communication architectures
- In this paper, we analyze the impact of network contention on the application mapping for tile-based Networkon-Chip (NoC) architectures. Our main theoretical contribution consist...
Chen-Ling Chou, Radu Marculescu
ICCD
2008
IEEE
194views Hardware» more  ICCD 2008»
14 years 9 months ago
Understanding performance, power and energy behavior in asymmetric multiprocessors
Abstract—Multiprocessor architectures are becoming popular in both desktop and mobile processors. Among multiprocessor architectures, asymmetric architectures show promise in sav...
Nagesh B. Lakshminarayana, Hyesoon Kim
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
14 years 9 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
ICCD
2008
IEEE
204views Hardware» more  ICCD 2008»
14 years 9 months ago
Bridging the gap between nanomagnetic devices and circuits
— This paper looks at designing circuit elements that will be constructed with nanoscale magnets within the Quantum-dot Cellular Automata (QCA) computational paradigm. In magneti...
Michael T. Niemier, Xiaobo Sharon Hu, Aaron Dingle...
ICCD
2008
IEEE
157views Hardware» more  ICCD 2008»
14 years 9 months ago
Power-aware soft error hardening via selective voltage scaling
—Nanoscale integrated circuits are becoming increasingly sensitive to radiation-induced transient faults (soft errors) due to current technology scaling trends, such as shrinking...
Kai-Chiang Wu, Diana Marculescu