VTS
1996
IEEE
14 years 27 days ago
1996
IEEE
In this paper, we for the rst time present experimental evidence that the die surface can act as an RC interconnect, becoming an important factor in determining the voltage of a o...
VTS
1996
IEEE
14 years 27 days ago
1996
IEEE
A fault-oriented sequential circuit test generator is described in which various types of distinguishing sequences are derived, both statically and dynamically, to aid the test ge...
VTS
1996
IEEE
14 years 27 days ago
1996
IEEE
VTS
1996
IEEE
14 years 27 days ago
1996
IEEE
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is o...
VTS
1996
IEEE
14 years 27 days ago
1996
IEEE
FPL
1997
Springer
14 years 27 days ago
1997
Springer
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
FPL
1997
Springer
14 years 27 days ago
1997
Springer
: The paper first proposes requirements for an ideal platform for codesign research. A new board developed at Imperial College, the Riley-2, is shown to meet these requirements. It...
FPL
1997
Springer
14 years 27 days ago
1997
Springer
Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency assoc...
FPL
1997
Springer
14 years 27 days ago
1997
Springer
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
FPL
1997
Springer
14 years 27 days ago
1997
Springer
Controllers for dynamically recon gurable FPGAs that are capable of supporting multiple independent tasks simultaneously need to be able to place designs at run{time when the seque...