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FPL
1999
Springer
84views Hardware» more  FPL 1999»
14 years 1 months ago
Rendering Postscript Fonts on FPGAs
Donald MacVicar, John W. Patterson, Satnam Singh
FPL
1999
Springer
74views Hardware» more  FPL 1999»
14 years 1 months ago
On Tool Integration in High-Performance FPGA Design Flows
Abstract. High-performance design flows for FPGAs often rely on module generators to counter coarse logic-block granularity and limited routing resources, However, the very flexi...
Andreas Koch
FPL
1999
Springer
95views Hardware» more  FPL 1999»
14 years 1 months ago
FPGA Viruses
Programmable logic is widely used, for applications ranging from eld-upgradable subsystems to advanced uses such as recon gurable computing platforms which are modi able at run-tim...
Ilija Hadzic, Sanjay Udani, Jonathan M. Smith
FPL
1999
Springer
80views Hardware» more  FPL 1999»
14 years 1 months ago
An Internet Based Development Framework for Reconfigurable Computing
The paper presents a development framework for the Xputer prototype Map-oriented Machine with Parallel Data Access (MoM-PDA). The MoM-PDA operates as a reconfigurable accelerator t...
Reiner W. Hartenstein, Michael Herz, Ulrich Nageld...
FPL
1999
Springer
147views Hardware» more  FPL 1999»
14 years 1 months ago
Synthia: Synthesis of Interacting Automata Targeting LUT-based FPGAs
This paper details the development, implementation, and results of Synthia, a system for the synthesis of Finite State Machines (FSMs) to field-programmable logic. Our approach us...
George A. Constantinides, Peter Y. K. Cheung, Wayn...
FPL
1999
Springer
103views Hardware» more  FPL 1999»
14 years 1 months ago
IP Validation for FPGAs Using Hardware Object Technology
Although verification and simulation tools are always improving, the results they provide remain hard to analyze and interpret. On one hand, verification sticks to the functional ...
Steve Casselman, John Schewel, Christophe Beaumont
MTDT
1999
IEEE
57views Hardware» more  MTDT 1999»
14 years 1 months ago
Tutorial: Characterizing SDRAMS
This paper presents characterization methods for an SDRAM in a manufacturing environment. Contact tests, dc tests, basic functional tests, signal margin tests and retention charac...
Jörg E. Vollrath
MTDT
1999
IEEE
87views Hardware» more  MTDT 1999»
14 years 1 months ago
Designing a Memory Module Tester
Daniel P. Van der Velde, A. J. van de Goor
MTDT
1999
IEEE
88views Hardware» more  MTDT 1999»
14 years 1 months ago
Computing in Memory Architectures for Digital Image Processing
Continuing improvements in semiconductor fabrication density are enabling new classes of System-on-aChip architectures that combine extensive processing logic and high-density mem...
Luke Roth, Lee D. Coraor, David L. Landis, Paul T....
MTDT
1999
IEEE
68views Hardware» more  MTDT 1999»
14 years 1 months ago
Unbalanced Cache Systems
The new concept of an unbalanced, hierarchicallydivided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different m...
David L. Rhodes, Wayne Wolf