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ITC
2003
IEEE
162views Hardware» more  ITC 2003»
14 years 2 months ago
Concurrent Error Detection in Linear Analog Circuits Using State Estimation
We present a novel methodology for concurrent error detection in linear analog circuits. We develop a rigorous theory that yields an error detection circuit of size that is, in ge...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
ITC
2003
IEEE
108views Hardware» more  ITC 2003»
14 years 2 months ago
Optical and Electrical Testing of Latchup in I/O Interface Circuits
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] te...
Franco Stellari, Peilin Song, Moyra K. McManus, Ro...
ITC
2003
IEEE
107views Hardware» more  ITC 2003»
14 years 2 months ago
The PXI Modular Instrumentation Architecture
This paper is a technology review of PXI. It describes the basic PXI architecture and looks in more detail at the features of the slot 2 timing and triggering module.
Eric Starkloff, Tim Fountain, Garth Black
ITC
2003
IEEE
113views Hardware» more  ITC 2003»
14 years 2 months ago
Fault Injection for Verifying Testability at the VHDL Level
This paper presents a technique to improve verification at the VHDL level of digital circuits by means of a specially designed fault injection block. The injection technique allow...
S. R. Seward, Parag K. Lala
ITC
2003
IEEE
90views Hardware» more  ITC 2003»
14 years 2 months ago
Burn-in Temperature Projections for Deep Sub-micron Technologies
Burn-in faces significant challenges in recent CMOS technologies. The self-generated heat of each IC in a burn-in environment contributes to larger currents that can lead to furth...
Oleg Semenov, Arman Vassighi, Manoj Sachdev, Ali K...
ITC
2003
IEEE
124views Hardware» more  ITC 2003»
14 years 2 months ago
Screening VDSM Outliers using Nominal and Subthreshold Supply Voltage IDDQ
Very Deep Sub-Micron (VDSM) defects are resolved as Statistical Post-Processing™ (SPP) outliers of a new IDDQ screen. The screen applies an IDDQ pattern once to the Device Under...
Chris Schuermyer, Brady Benware, Kevin Cota, Rober...
ITC
2003
IEEE
143views Hardware» more  ITC 2003»
14 years 2 months ago
A Case Study of IR-Drop in Structured At-Speed Testing
At-speed test has become a requirement in IC technologies below 180 nm. Unfortunately, test mode switching activity and IR-drop present special challenges to the successful applic...
Jayashree Saxena, Kenneth M. Butler, Vinay B. Jaya...
ITC
2003
IEEE
156views Hardware» more  ITC 2003»
14 years 2 months ago
A High Precision IDDQ Measurement System With Improved Dynamic Load Regulation
This paper describes a system for performing high precision IDDQ measurement of CMOS ICs having a large peak current during operation. Although the measurement rate is at a low sp...
Nobuhiro Sato, Yoshihiro Hashimoto
ITC
2003
IEEE
197views Hardware» more  ITC 2003»
14 years 2 months ago
Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA)
A scalable laser-based timing analysis technique we call laser assisted device alteration (LADA) is introduced for the rapid isolation and analysis of defect-free performance limi...
Jeremy A. Rowlette, Travis M. Eiles
ITC
2003
IEEE
126views Hardware» more  ITC 2003»
14 years 2 months ago
Convolutional Compaction of Test Responses
This paper introduces a finite memory compactor called convolutional compactor that provides compaction ratios of test responses in excess of 100x even for a very small number of ...
Janusz Rajski, Jerzy Tyszer, Chen Wang, Sudhakar M...