DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Run-time task migration in a heterogeneous multiprocessor System-on-Chip (MP-SoC) is a challenge that requires cooperation between the task and the operating system. In task migra...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Multi-channel waveform monitoring technique enhances built-in test and diagnostic capability of mixed-signal VLSI circuits. An 8-channel prototype system incorporates adaptive sam...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
A technique for evaluating noise figure suitable for BIST implementation is described. It is based on a low cost single-bit digitizer, which allows the simultaneous evaluation of ...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
A technique based on the sensitivity of the output to input waveform is presented for accurate propagation of delay information through a gate for the purpose of static timing ana...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Embedded software continues to play an ever increasing role in the design of complex embedded applications. In part, the elevel of abstraction provided by a high-level programming...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
We present a complete top-down design of a low-power multi-channel clock recovery circuit based on gated current-controlled oscillators. The flow includes several tools and method...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
In nanometer scaled CMOS devices significant increase in the subthreshold, the gate and the reverse biased junction band-toband-tunneling (BTBT) leakage, results in the large incr...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
Functional verification of microprocessors is one of the most complex and expensive tasks in the current system-on-chip design process. A significant bottleneck in the validatio...
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
A class of discrete event synthesis problems can be reduced to solving language equations F • X ⊆ S, where F is the fixed component and S the specification. Sequential synthes...