Sciweavers

DATE
2005
IEEE
106views Hardware» more  DATE 2005»
14 years 2 months ago
SAT-Based Complete Don't-Care Computation for Network Optimization
This paper describes an improved approach to Boolean network optimization using internal don’t-cares. The improvements concern the type of don’t-cares computed, their scope, a...
Alan Mishchenko, Robert K. Brayton
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
14 years 2 months ago
A Tool and Methodology for AC-Stability Analysis of Continuous-Time Closed-Loop Systems
—Presented are a methodology and a DFII-based tool for AC-stability analysis of a wide variety of closed-loop continuous-time (operational amplifiers and other linear circuits). ...
Momchil Milev, Rod Burt
DATE
2005
IEEE
136views Hardware» more  DATE 2005»
14 years 2 months ago
Increasing Register File Immunity to Transient Errors
Transient errors are one of the major reasons for system downtime in many systems. While prior research has mainly focused on the impact of transient errors on datapath, caches an...
Gokhan Memik, Mahmut T. Kandemir, Ozcan Ozturk
DATE
2005
IEEE
120views Hardware» more  DATE 2005»
14 years 2 months ago
Why Systems-on-Chip Needs More UML like a Hole in the Head
Let’s be clear from the outset: SoC can most certainly make use of UML; SoC just doesn’t need more UML, or even all of it. The advent of model mappings, coupled with marks tha...
Stephen J. Mellor, John R. Wolfe, Campbell McCausl...
DATE
2005
IEEE
127views Hardware» more  DATE 2005»
14 years 2 months ago
Quantum Circuit Simplification Using Templates
Dmitri Maslov, Christina Young, D. Michael Miller,...
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
14 years 2 months ago
Bound Set Selection and Circuit Re-Synthesis for Area/Delay Driven Decomposition
This paper addresses two problems related to disjointsupport decomposition of Boolean functions. First, we present a heuristic for finding a subset of variables, X, which results...
Andrés Martinelli, Elena Dubrova
DATE
2005
IEEE
128views Hardware» more  DATE 2005»
14 years 2 months ago
Design of a Virtual Component Neutral Network-on-Chip Transaction Layer
Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communica...
Philippe Martin
DATE
2005
IEEE
116views Hardware» more  DATE 2005»
14 years 2 months ago
Uniformly-Switching Logic for Cryptographic Hardware
Recent work on Differential Power Analysis shows that even mathematically-secure cryptographic protocols may be vulnerable at the physical implementation level. By measuring energ...
Igor L. Markov, Dmitri Maslov