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ISQED
2007
IEEE
104views Hardware» more  ISQED 2007»
14 years 3 months ago
System Level Estimation of Interconnect Length in the Presence of IP Blocks
With the increasing size and sophistication of circuits and specifically in the presence of IP blocks, new wirelength estimation methods are needed in the design flow of large-sca...
Taraneh Taghavi, Ani Nahapetian, Majid Sarrafzadeh
ISQED
2007
IEEE
203views Hardware» more  ISQED 2007»
14 years 3 months ago
Future Prediction of Self-Heating in Short Intra-Block Wires
This paper predicts self-heating effect in a short intrablock wire will arise as a design issue with technology scaling. The short intra-block wires are close to the substrate an...
Kenichi Shinkai, Masanori Hashimoto, Takao Onoye
ISQED
2007
IEEE
140views Hardware» more  ISQED 2007»
14 years 3 months ago
Leakage-Conscious Architecture-Level Power Estimation for Partitioned and Power-Gated SRAM Arrays
We propose a methodology and power models for an accurate high-level power estimation of physically partitioned and power-gated SRAM arrays. The models offer accurate estimation o...
Minh Quang Do, Mindaugas Drazdziulis, Per Larsson-...
ISQED
2007
IEEE
148views Hardware» more  ISQED 2007»
14 years 3 months ago
On Accelerating Soft-Error Detection by Targeted Pattern Generation
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu
ISQED
2007
IEEE
124views Hardware» more  ISQED 2007»
14 years 3 months ago
Multi-Dimensional Circuit and Micro-Architecture Level Optimization
This paper studies multi-dimensional optimization at both circuit and micro-architecture levels. By formulating and solving the optimization problem with conflicting design objec...
Zhenyu Qi, Matthew M. Ziegler, Stephen V. Kosonock...
ISQED
2007
IEEE
136views Hardware» more  ISQED 2007»
14 years 3 months ago
A Data-Driven Statistical Approach to Analyzing Process Variation in 65nm SOI Technology
Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Ol...
ISQED
2007
IEEE
197views Hardware» more  ISQED 2007»
14 years 3 months ago
A Simple Flip-Flop Circuit for Typical-Case Designs for DFM
The deep submicron (DSM) semiconductor technologies will make the worst-case design impossible, since they can not provide design margins that it requires. Research directions sho...
Toshinori Sato, Yuji Kunitake
ISQED
2007
IEEE
128views Hardware» more  ISQED 2007»
14 years 3 months ago
A Model for Timing Errors in Processors with Parameter Variation
Parameter variation in integrated circuits causes sections of a chip to be slower than others. To prevent any resulting timing errors, designers have traditionally designed for th...
Smruti R. Sarangi, Brian Greskamp, Josep Torrellas
ISQED
2007
IEEE
166views Hardware» more  ISQED 2007»
14 years 3 months ago
Reducing the Energy Consumption in Fault-Tolerant Distributed Embedded Systems with Time-Constraint
In this paper we address the problem of reducing the energy consumption in distributed embedded systems associated with time-constraints and equipped with fault-tolerant technique...
Yuan Cai, Sudhakar M. Reddy, Bashir M. Al-Hashimi
ISQED
2007
IEEE
106views Hardware» more  ISQED 2007»
14 years 3 months ago
Passive Modeling of Interconnects by Waveform Shaping
In this paper, we propose a new approach to enforcing the passivity of a reduced system of general passive linear time invariant circuits. Instead of making the reduced models pas...
Boyuan Yan, Pu Liu, Sheldon X.-D. Tan, Bruce McGau...