Growth of pixel density and sensor array size increases the likelihood of developing in-field pixel defects. An ongoing study on defect development in imagers has now provided us ...
Jenny Leung, Jozsef Dudas, Glenn H. Chapman, Israe...
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...
During semiconductor manufacturing, particles undesirably depose on the surface of the wafer causing “open” and “short” defects to interconnects. In this paper, a third ty...
The paper discusses a novel approach for reduction of fault detection latency in a selfchecking sequential circuit. The Authors propose decomposing the finite state machine (FSM) ...
Many side-channel attacks on implementations of cryptographic algorithms have been developed in recent years demonstrating the ease of extracting the secret key. In response, vari...
Francesco Regazzoni, Thomas Eisenbarth, Johann Gro...
Solid-state image sensors develop in-field defects in all common environments. Experiments have demonstrated the growth of significant quantities of hot-pixel defects that degrade...
Jozsef Dudas, Michelle L. La Haye, Jenny Leung, Gl...
Chemically Assembled Electronic Nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing di...
This paper presents a new routing protocol of network-on-chip(Noc) called ‘Source Routing for Noc’(SRN) for fault tolerant communication of Systems-on-chip(Soc). The proposed ...
We propose and evaluate the use of lazy error detection for a superscalar, out-of-order microprocessor’s functional units. The key insight is that error detection is off the cri...
Mahmut Yilmaz, Albert Meixner, Sule Ozev, Daniel J...
In the paper, a methodology of developing checkers for communication protocol testing is presented. It was used to develop checker to test IP cores communication protocol implemen...