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DSD
2007
IEEE
116views Hardware» more  DSD 2007»
14 years 3 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
DSD
2007
IEEE
86views Hardware» more  DSD 2007»
14 years 3 months ago
Toggle Equivalence Preserving (TEP) Logic Optimization
Eugene Goldberg, Kanupriya Gulati, Sunil P. Khatri
DSD
2007
IEEE
164views Hardware» more  DSD 2007»
14 years 3 months ago
An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation
In this paper, we present an efficient hardware architecture for real-time implementation of quarter-pixel accurate variable block size motion estimation for H.264 / MPEG4 Part 10...
Serkan Oktem, Ilker Hamzaoglu
DSD
2007
IEEE
114views Hardware» more  DSD 2007»
14 years 3 months ago
General Digit-Serial Normal Basis Multiplier with Distributed Overlap
We present the architecture of digit-serial normal basis multiplier over GF(2m ). The multiplier was derived from the multiplier of Agnew et al. Proposed multiplier is scalable by...
Martin Novotný, Jan Schmidt
DSD
2007
IEEE
122views Hardware» more  DSD 2007»
14 years 3 months ago
Energy Based Design Space Exploration of Multiprocessor VLIW Architectures
Today energy is an important factor in designing a multiprocessor system. The overall goal of this work is to propose a methodology for design space exploration of VLIW multiproce...
Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksr...
DSD
2007
IEEE
105views Hardware» more  DSD 2007»
14 years 3 months ago
Scaling Analytical Models for Soft Error Rate Estimation Under a Multiple-Fault Environment
With continuing increase in soft error rates, its foreseeable that multiple faults will eventually need to be considered when modeling circuit sensitivity and evaluating faulttole...
Christian J. Hescott, Drew C. Ness, David J. Lilja
DFT
2007
IEEE
100views VLSI» more  DFT 2007»
14 years 3 months ago
Soft Error Hardening for Asynchronous Circuits
Weidong Kuang, Casto Manuel Ibarra, Peiyi Zhao
DFT
2007
IEEE
86views VLSI» more  DFT 2007»
14 years 3 months ago
Production Yield and Self-Configuration in the Future Massively Defective Nanochips
We address two problems in this work, namely, 1) the resilience challenge in the future chips made up of massively defective nanoelements and organized in replicative multicore ar...
Piotr Zajac, Jacques Henri Collet
DFT
2007
IEEE
105views VLSI» more  DFT 2007»
14 years 3 months ago
A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
Sybille Hellebrand, Christian G. Zoellin, Hans-Joa...