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MICRO
2008
IEEE
92views Hardware» more  MICRO 2008»
14 years 3 months ago
Online design bug detection: RTL analysis, flexible mechanisms, and evaluation
Higher level of resource integration and the addition of new features in modern multi-processors put a significant pressure on their verification. Although a large amount of res...
Kypros Constantinides, Onur Mutlu, Todd M. Austin
MICRO
2008
IEEE
109views Hardware» more  MICRO 2008»
14 years 3 months ago
Dependence-aware transactional memory for increased concurrency
—Transactional memory (TM) is a promising paradigm for helping programmers take advantage of emerging multicore platforms. Though they perform well under low contention, hardware...
Hany E. Ramadan, Christopher J. Rossbach, Emmett W...
MICRO
2008
IEEE
153views Hardware» more  MICRO 2008»
14 years 3 months ago
CPR: Composable performance regression for scalable multiprocessor models
Uniprocessor simulators track resource utilization cycle by cycle to estimate performance. Multiprocessor simulators, however, must account for synchronization events that increas...
Benjamin C. Lee, Jamison D. Collins, Hong Wang 000...
MICRO
2008
IEEE
84views Hardware» more  MICRO 2008»
14 years 3 months ago
A performance-correctness explicitly-decoupled architecture
Optimizing the common case has been an adage in decades of processor design practices. However, as the system complexity and optimization techniques’ sophistication have increas...
Alok Garg, Michael C. Huang
ISQED
2008
IEEE
154views Hardware» more  ISQED 2008»
14 years 3 months ago
Error Protected Data Bus Inversion Using Standard DRAM Components
Off-chip communication consumes a significant part of main memory system power. Existing solutions imply the use of specialized memories or assume error free environments. This i...
Maurizio Skerlj, Paolo Ienne
ISQED
2008
IEEE
142views Hardware» more  ISQED 2008»
14 years 3 months ago
Clock Skew Analysis via Vector Fitting in Frequency Domain
An efficient frequency-based clock analysis method: CSAV is proposed in this paper. It computes the circuit response by first solving the state equation in frequency domain, and...
Ling Zhang, Wenjian Yu, Haikun Zhu, Wanping Zhang,...
ISQED
2008
IEEE
150views Hardware» more  ISQED 2008»
14 years 3 months ago
Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates
— The dominant substrate noise coupling mechanism is determined for multiple switching gates based on a physically intuitive model. The model exhibits reasonable accuracy as comp...
Emre Salman, Eby G. Friedman, Radu M. Secareanu, O...
ISQED
2008
IEEE
119views Hardware» more  ISQED 2008»
14 years 3 months ago
Instruction Scheduling for Variation-Originated Variable Latencies
The advance in semiconductor technologies presents the serious problem of parameter variations. They affect threshold voltage of transistors and thus circuit delay also has variat...
Toshinori Sato, Shingo Watanabe
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 3 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...
ISQED
2008
IEEE
101views Hardware» more  ISQED 2008»
14 years 3 months ago
Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations
Large-scale process fluctuations (particularly random device mismatches) at nanoscale technologies bring about highdimensional strongly nonlinear performance variations that canno...
Xin Li, Yu Cao