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ICCD
2006
IEEE
132views Hardware» more  ICCD 2006»
14 years 9 months ago
FPGA-based Design of a Large Moduli Multiplier for Public Key Cryptographic Systems
— High secure cryptographic systems require large bit-length encryption keys which presents a challenge to their efficient hardware implementation especially in embedded devices...
Osama Al-Khaleel, Christos A. Papachristou, Franci...
ICCD
2006
IEEE
104views Hardware» more  ICCD 2006»
14 years 9 months ago
Guiding Architectural SRAM Models
— Caches, block memories, predictors, state tables, and other forms of on-chip memory are continuing to consume a greater portion of processor designs with each passing year. Mak...
Banit Agrawal, Timothy Sherwood
ICCD
2006
IEEE
185views Hardware» more  ICCD 2006»
14 years 9 months ago
An accurate Energy estimation framework for VLIW Processor Cores
— In this paper, we present a comprehensive energy estimation framework for software executing on Very Long Instruction Word (VLIW) processor cores. The proposed energy model is ...
Sourav Roy, Rajat Bhatia, Ashish Mathur
ICCD
2006
IEEE
107views Hardware» more  ICCD 2006»
14 years 9 months ago
Design and Implementation of the TRIPS Primary Memory System
Abstract— In this paper, we describe the design and implementation of the primary memory system of the TRIPS processor. To match the aggressive execution bandwidth and support hi...
Simha Sethumadhavan, Robert G. McDonald, Rajagopal...
ICCD
2006
IEEE
118views Hardware» more  ICCD 2006»
14 years 9 months ago
A System-level Network-on-Chip Simulation Framework Integrated with Low-level Analytical Models
—This paper presents a system-level Network-on-Chip modeling framework that integrates transaction-level model and analytical wire model for design space exploration. It enables ...
Jinwen Xi, Peixin Zhong
ICCD
2006
IEEE
95views Hardware» more  ICCD 2006»
14 years 9 months ago
Scale in Chip Interconnect requires Network Technology
— Continued scaling of CMOS has lead to a problem of scale as gates are faster than light travelling across a chip. Scalability used to be the hallmark of CMOS. Half the size, do...
Enno Wein
ICCD
2006
IEEE
96views Hardware» more  ICCD 2006»
14 years 9 months ago
Synthesis of Regular Logic Bricks for Robust IC Design
Kim Yaw Tong, Lawrence T. Pileggi
ICCD
2006
IEEE
103views Hardware» more  ICCD 2006»
14 years 9 months ago
Architectural Support for Run-Time Validation of Control Flow Transfer
—Current micro-architecture blindly uses the address in the program counter to fetch and execute instructions without validating its legitimacy. Whenever this blind-folded instru...
Yixin Shi, Sean Dempsey, Gyungho Lee