Sciweavers

ITC
2003
IEEE
114views Hardware» more  ITC 2003»
14 years 4 months ago
RIC/DICMOS-- Multi-channel CMOS Formatter
NPTest CMOS formatter, embedded within the new timing generation IC, can provide formatted levels and internal strobe markers for eight independent pinelectronics channels at up t...
Ahmed Rashid Syed
ITC
2003
IEEE
97views Hardware» more  ITC 2003»
14 years 4 months ago
A Generic Test Path and DUT Model for DataCom ATE
– It is well known that the output signals measured by an automatic test equipment (ATE) system are not only due to the device-under-test (DUT), but also due to the test path. Fo...
Jie Sun, Mike Li
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
14 years 4 months ago
On Reducing Aliasing Effects and Improving Diagnosis of Logic BIST Failures
Diagnosing failing vectors in a Built-In Self Test (BIST) environment is a difficult task because of the highly compressed signature coming out of the Multiple Input Shift Regist...
Ramesh C. Tekumalla
ITC
2003
IEEE
120views Hardware» more  ITC 2003»
14 years 4 months ago
Test Vector Generation Based on Correlation Model for Ratio-Iddq
For ratio-Iddq testing, the test performance is significantly affected by the correlation between two currents of different input patterns as process parameters vary. In this p...
Xiaoyun Sun, Larry L. Kinney, Bapiraju Vinnakota
ITC
2003
IEEE
127views Hardware» more  ITC 2003»
14 years 4 months ago
Testing of Droplet-Based Microelectrofluidic Systems
Composite microsystems that integrate mechanical and fluidic components are fast emerging as the next generation of system-on-chip designs. As these systems become widespread in s...
Fei Su, Sule Ozev, Krishnendu Chakrabarty
ITC
2003
IEEE
149views Hardware» more  ITC 2003»
14 years 4 months ago
BIST for Xilinx 4000 and Spartan Series FPGAs: A Case Study
Abstract: We discuss the development of Built-In SelfTest (BIST) configurations that test all of the programmable logic and interconnect resources in the core of Xilinx 4000E, 4000...
Charles E. Stroud, Keshia N. Leach, Thomas A. Slau...
ITC
2003
IEEE
162views Hardware» more  ITC 2003»
14 years 4 months ago
Concurrent Error Detection in Linear Analog Circuits Using State Estimation
We present a novel methodology for concurrent error detection in linear analog circuits. We develop a rigorous theory that yields an error detection circuit of size that is, in ge...
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
ITC
2003
IEEE
108views Hardware» more  ITC 2003»
14 years 4 months ago
Optical and Electrical Testing of Latchup in I/O Interface Circuits
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] te...
Franco Stellari, Peilin Song, Moyra K. McManus, Ro...
ITC
2003
IEEE
107views Hardware» more  ITC 2003»
14 years 4 months ago
The PXI Modular Instrumentation Architecture
This paper is a technology review of PXI. It describes the basic PXI architecture and looks in more detail at the features of the slot 2 timing and triggering module.
Eric Starkloff, Tim Fountain, Garth Black