Failure analysis (FA) and diagnosis of memory cores plays a key role in system-on-chip (SOC) product development and yield ramp-up. Conventional FA based on bitmaps and the experi...
MEMS processes and components are rapidly changing in device design, processing, and, most importantly, application. This paper will discuss the future challenges faced by the MEM...
Many of the tools and techniques used to evaluate and characterize ICs can be applied to MEMS technology. In this paper we discuss various tools and techniques used to provide str...
MEMS components by their very nature have different and unique failure mechanisms than their macroscopic counterparts. This paper discusses failure mechanisms observed in various ...
While the IEEE P1500 standards working group is on the verge of recommending a standard test interface for "non-mergeable" cores, a need was felt to adopt a standard met...
Michael G. Wahl, Sudipta Bhawmik, Kamran Zarrineh,...
This paper presents an approach for reducing the test data volume that has to be stored in ATE vector memory for IC manufacturing testing. We exploit the capabilities of present A...
Harald P. E. Vranken, Friedrich Hapke, Soenke Rogg...
We present an efficient algorithm for identification of two-line bridges in combinational CMOS logic that narrows down the two-line bridge candidates based on tester responses for...
Thomas J. Vogels, Wojciech Maly, R. D. (Shawn) Bla...
–This paper provides proof of concept for the newly-approved 1149.6 standard by investigating the first silicon implementation of the test receiver. EXTEST and EXTEST_PULSE tests...