Current-based tests are the most effective methods available to detect resistive shorts. Delta IDDQ testing is the most sensitive variant and can handle off-state currents of 10-1...
This paper describes a new post-silicon validation problem for diagnosing systematic timing errors. We illustrate the differences between timing validation and the traditional log...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M....
Creating functional tests that work on an ATE has always been a significant challenge [1]. This paper identifies the fundamental mechanisms for functional test failures of an SOC ...
Deliberate injection of faults into cryptographic devices is an effective cryptanalysis technique against symmetric and asymmetric encryption. We will describe a general concurren...
This paper describes an Addressable Shadow Protocol device that is capable of providing connectivity between a backplane resident IEEE 1149.1 test bus master and a plurality of 11...
Many of the semiconductor technologies are already facing limitations while new-generation data and telecommunication systems are implemented. Although in its infancy, superconduc...
As the performance of Analog-to-Digital Converters continues to improve, it is becoming more challenging and costly to develop sufficiently fast and low-drift signal generators th...
Le Jin, Kumar L. Parthasarathy, Turker Kuyel, Dega...
Energy Consumption Ratio (ECR) test, a current-based test, has shown its ability to reduce the impact of process variations and detect hard-to-detect faults. The effectiveness of ...
A delay-locked loop (DLL) based built-in self test (BIST) circuit has been designed with a 0.18 µ m TSMC process (CM018) to test chip I/O speeds, specifically, the setup and hold...