ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
We study the extension of applicability of system-level testing techniques to the construction of a consistent model of (legacy) systems under test, which are seen as black boxes....
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
Intermittent scan chain hold-time fault is discussed in this paper and a method to diagnose the faulty site in a scan chain is proposed as well. Unlike the previous scan chain dia...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
High Speed Serializer Deserializers (serdes) are traditionally tested using functional BIST. This paper presents an improved BIST for testing the digital part of a serdes using ci...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
This paper deals with Hybrid multisite testing of VLSI chips by utilizing automatic test equipment (ATE) in connection with built-in self-test (BIST). The performance of a multisi...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
: The paper presents a novel technique for generating effective vectors for delay defects. The test set achieves high path delay fault coverage to capture smalldistributed delay de...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
Prior to the mid 1980s, the dominance of through-hole packaging of integrated circuits (ICs) provided easy access to nearly every pin of every chip on a printed circuit board. Pro...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
An open architecture tester allows a third party to develop its own instrument. Such a tester must be open in the sense that it needs to be able to integrate this instrument with ...
ITC
2003
IEEE
14 years 21 days ago
2003
IEEE
The objective of this paper is to present an infrastructure IP (I-IP) designed to characterize yield loss in the process back-end. The I-IP structure is described in using a botto...