96 search results - page 9 / 20 » Design space exploration of caches using compressed traces |
MICRO
2009
IEEE
14 years 3 months ago
2009
IEEE
Aggressive technology scaling to 45nm and below introduces serious reliability challenges to the design of microprocessors. Large SRAM structures used for caches are particularly ...
ISCA
2011
IEEE
13 years 8 days ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
ISCA
2010
IEEE
13 years 10 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
GLVLSI
2010
IEEE
14 years 1 months ago
2010
IEEE
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
CODES
2004
IEEE
14 years 9 days ago
2004
IEEE
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...