35 search results - page 1 / 7 » Die Stacking (3D) Microarchitecture |
MICRO
2006
IEEE
14 years 4 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
MICRO
2008
IEEE
14 years 5 months ago
2008
IEEE
— As semiconductor processing techniques continue to scale down, transient faults, also known as soft errors, are increasingly becoming a reliability threat to high-performance m...
HPCA
2007
IEEE
14 years 11 months ago
2007
IEEE
3D integration technology greatly increases transistor density while providing faster on-chip communication. 3D implementations of processors can simultaneously provide both laten...
ICCD
2005
IEEE
14 years 7 months ago
2005
IEEE
3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication invo...
MICRO
2009
IEEE
14 years 5 months ago
2009
IEEE
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...