951 search results - page 39 / 191 » Hardware design experiences in ZebraNet |
ITC
1998
IEEE
13 years 12 months ago
1998
IEEE
Automated fault diagnosis based on the stuckat fault model is not always effective. This paper presents practical experiences in applying a bridging fault based diagnosis techniqu...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
ASIC designs for future communication applications cannot be simulated exhaustively. Formal Property Checking is a powerful technology to overcome the limitations of current funct...
ISSS
1997
IEEE
13 years 11 months ago
1997
IEEE
Embedded processor-based systems allow for the tailoring of the on-chip memory architecture based on application-specific requirements. We present an analytical strategy for explo...
DATE
2005
IEEE
13 years 9 months ago
2005
IEEE
This paper proposes a novel architecture synthesis algorithm for single-loop single-bit ∆Σ modulators. We defined a generic modulator architecture and derived its noise and si...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...