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CORR
2010
Springer
138views Education» more  CORR 2010»
13 years 8 months ago
Shallow Circuits with High-Powered Inputs
A polynomial identity testing algorithm must determine whether an input polynomial (given for instance by an arithmetic circuit) is identically equal to 0. In this paper, we show ...
Pascal Koiran
PATMOS
2004
Springer
14 years 2 months ago
Delay Evaluation of High Speed Data-Path Circuits Based on Threshold Logic
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
Peter Celinski, Derek Abbott, Sorin Cotofana
ASPDAC
1998
ACM
65views Hardware» more  ASPDAC 1998»
14 years 26 days ago
A Redundant Fault Identification Algorithm with Exclusive-OR Circuit Reduction
−This paper describes a new redundant fault identification algorithm with Exclusive-OR circuit reduction. The experimental results using this algorithm with a FAN-based test patt...
Miyako Tandai, Takao Shinsha
TVLSI
2010
13 years 3 months ago
Improving FPGA Performance for Carry-Save Arithmetic
The selective use of carry-save arithmetic, where appropriate, can accelerate a variety of arithmetic-dominated circuits. Carry-save arithmetic occurs naturally in a variety of DSP...
Hadi Parandeh-Afshar, Ajay K. Verma, Philip Brisk,...
ICCAD
2003
IEEE
204views Hardware» more  ICCAD 2003»
14 years 5 months ago
Modeling of Ballistic Carbon Nanotube Field Effect Transistors for Efficient Circuit Simulation
Carbon Nanotube Field-Effect Transistors (CNFETs) are being extensively studied as possible successors to CMOS. Novel device structures have been fabricated and device simulators ...
Arijit Raychowdhury, Saibal Mukhopadhyay, Kaushik ...