DFT
2000
IEEE
13 years 12 months ago
2000
IEEE
1 Over the last years, an increasing number of safety-critical tasks have been demanded to computer systems. In particular, safety-critical computer-based applications are hitting ...
DFT
2000
IEEE
13 years 12 months ago
2000
IEEE
Because domino logic design offers smaller area and higher speed than complementary CMOS design, it has been very popularly used to design highperformance processors. However: dom...
GLVLSI
2010
IEEE
14 years 6 days ago
2010
IEEE
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
GLVLSI
2010
IEEE
14 years 8 days ago
2010
IEEE
Flash Memory is a desirable candidate for main memory replacement in embedded systems due to its low leakage power consumption, higher density and non-volatility characteristics. ...
GLVLSI
2010
IEEE
14 years 8 days ago
2010
IEEE
In this paper, we investigate dual applications for logic implications, which can provide both online error detection capabilities and improve the testing efficiency of an integr...
GLVLSI
2010
IEEE
14 years 8 days ago
2010
IEEE
This paper presents a self-compensation scheme of manufacturing variability for clock skew reduction. In the proposed scheme, a CDN with embedded variability sensors tunes variabl...
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
A device testing method called Transient Signal Analysis (TSA) is subjected to elements of a real process and testing environment in this paper. Simulations experiments are design...
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
Parallel test application helps reduce the otherwise considerable test times in SOCs; yet its applicability is limited by average and peak power considerations. The typical test v...
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
For deep sub-micron system-on-chips (SoC), interconnects are critical determinants of performance, reliability and power. Buses and long interconnects being susceptible to crossta...
VTS
2002
IEEE
14 years 10 days ago
2002
IEEE
This paper presents a procedure for modifying a given set of scan vectors so that the peak power during scan testing is kept below a specified limit without reducing fault coverag...