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    FPGA
    2007
    ACM
    150views FPGA» more  FPGA 2007»
    FPGA-friendly code compression for horizontal microcoded custom IPs
    14 years 3 months ago
    FPGA-friendly code compression for horizontal microcoded custom IPs
    Download  www.ics.uci.edu
    Shrinking time-to-market and high demand for productivity has driven traditional hardware designers to use design methodologies that start from high-level languages. However, meet...
    Bita Gorjiara, Daniel Gajski
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    FPGA
    2007
    ACM
    163views FPGA» more  FPGA 2007»
    Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
    14 years 3 months ago
    Improved SAT-based Boolean matching using implicants for LUT-based FPGAs
    Download  cadlab.cs.ucla.edu
    Boolean matching (BM) is a widely used technique in FPGA resynthesis and architecture evaluation. In this paper we present several improvements to the recently proposed SAT-based ...
    Jason Cong, Kirill Minkovich
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    FPGA
    2007
    ACM
    185views FPGA» more  FPGA 2007»
    Power-aware FPGA logic synthesis using binary decision diagrams
    14 years 3 months ago
    Power-aware FPGA logic synthesis using binary decision diagrams
    Download  www.ecs.umass.edu
    Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
    Kevin Oo Tinmaung, David Howland, Russell Tessier
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    FPGA
    2007
    ACM
    106views FPGA» more  FPGA 2007»
    A synthesizable datapath-oriented embedded FPGA fabric
    14 years 3 months ago
    A synthesizable datapath-oriented embedded FPGA fabric
    Download  www.ece.ubc.ca
    We present an architecture for a synthesizable datapathoriented Field Programmable Gate Array (FPGA) core which can be used to provide post-fabrication flexibility to a Systemon-...
    Steven J. E. Wilton, Chun Hok Ho, Philip Heng Wai ...
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    FPGA
    2007
    ACM
    114views FPGA» more  FPGA 2007»
    Design of a logic element for implementing an asynchronous FPGA
    14 years 3 months ago
    Design of a logic element for implementing an asynchronous FPGA
    Download  comp.uark.edu
    A reconfigurable logic element (LE) is developed for use in constructing a NULL Convention Logic (NCL) FPGA. It can be configured as any of the 27 fundamental NCL gates, including...
    Scott C. Smith
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    FPGA
    2007
    ACM
    122views FPGA» more  FPGA 2007»
    The shunt: an FPGA-based accelerator for network intrusion prevention
    14 years 3 months ago
    The shunt: an FPGA-based accelerator for network intrusion prevention
    Download  www.icsi.berkeley.edu
    Today’s network intrusion prevention systems (IPSs) must perform increasingly sophisticated analysis—parsing protocols and interpreting application dialogs rather than simply ...
    Nicholas Weaver, Vern Paxson, José M. Gonz&...
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    FPGA
    2007
    ACM
    144views FPGA» more  FPGA 2007»
    A versatile, low latency HyperTransport core
    14 years 3 months ago
    A versatile, low latency HyperTransport core
    Download  www.hypertransport.org
    David Slogsnat, Alexander Giese, Ulrich Brüni...
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    FPGA
    2007
    ACM
    153views FPGA» more  FPGA 2007»
    GlitchLess: an active glitch minimization technique for FPGAs
    14 years 3 months ago
    GlitchLess: an active glitch minimization technique for FPGAs
    Download  www.ece.ubc.ca
    This paper describes a technique that reduces dynamic power in FPGAs by reducing the number of glitches in the global routing resources. The technique involves adding programmable...
    Julien Lamoureux, Guy G. Lemieux, Steven J. E. Wil...
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    FPGA
    2007
    ACM
    105views FPGA» more  FPGA 2007»
    Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation
    14 years 3 months ago
    Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation
    Download  www.ee.ucla.edu
    Yan Lin, Lei He
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    FPGA
    2007
    ACM
    84views FPGA» more  FPGA 2007»
    A routing fabric for monolithically stacked 3D-FPGA
    14 years 3 months ago
    A routing fabric for monolithically stacked 3D-FPGA
    Download  isl.stanford.edu
    A previous study on the benefits of monolithically stacked 3D-FPGA has estimated a 3.2x improvement in logic den
    Mingjie Lin, Abbas El Gamal
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