ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Abstract—Manufacturing process variations lead to circuit timing variability and a corresponding timing yield loss. Traditional corner analysis consists of checking all process c...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Capacitive interconnections are very promising structures for high-speed and low-power signaling in 3D packages. Since the performance of AC links, in terms of Band-Width and Bit-...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
The use of CMOS nanometer technologies at 65 nm and below will pose serious challenges on the design of mixed-signal integrated systems in the very near future. Rising design comp...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
We present a dynamic voltage scaling (DVS) technique that minimizes system-wide energy consumption for both periodic and sporadic tasks. It is known that a system consists of proc...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Soft-core microprocessors mapped onto field-programmable gate arrays (FPGAs) represent an increasingly common embedded software implementation option. Modern FPGA soft-cores are p...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
We present a gridless method for solving the interior problem for a set of conductors in an homogeneous dielectric, at sufficiently high frequencies, valid for conductor lengths ...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
This paper examines how circuits and systems made from molecular QCA devices might function. Our design constraints are “chemically reasonable” in that we consider the charact...
ICCAD
2006
IEEE
14 years 8 months ago
2006
IEEE
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...