DAC
2005
ACM
14 years 28 days ago
2005
ACM
Traditional corner analysis fails to guarantee a target yield for a given performance metric. However, recently proposed solutions, in the form of statistical timing analysis, whi...
DAC
2004
ACM
14 years 2 months ago
2004
ACM
There is an increased dominance of intra-die process variations, creating a need for an accurate and fast statistical timing analysis. Most of the recent proposed approaches assum...
ASPDAC
2007
ACM
14 years 3 months ago
2007
ACM
With aggressive scaling down of feature sizes in VLSI fabrication, process variation has become a critical issue in designs. We show that two necessary conditions for the "Ma...
ICCAD
2003
IEEE
14 years 4 months ago
2003
IEEE
Process variations have become a critical issue in performance verification of high-performance designs. We present a new, statistical timing analysis method that accounts for int...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
The growing impact of within-die process variation has created the need for statistical timing analysis, where gate delays are modeled as random variables. Statistical timing anal...
DATE
2005
IEEE
14 years 4 months ago
2005
IEEE
— State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated due to global source of variations and path r...
DATE
2006
IEEE
14 years 5 months ago
2006
IEEE
State of the art statistical timing analysis (STA) tools often yield less accurate results when timing variables become correlated. Spatial correlation and correlation caused by p...
DATE
2008
IEEE
14 years 5 months ago
2008
IEEE
Statistical timing analysis needs a priori knowledge of process variations. Lack of such a priori knowledge of process variations prevents accurate statistical timing analysis, fo...
DATE
2008
IEEE
14 years 5 months ago
2008
IEEE
VLSI timing analysis and power estimation target the same circuit switching activity. Power estimation techniques are categorized as (1) static, (2) statistical, and (3) simulatio...
ICCAD
2005
IEEE
14 years 7 months ago
2005
IEEE
— Variability in the chip design process has been relatively increasing with technology scaling to smaller dimensions. Using worst case analysis for circuit optimization severely...