Prior to the mid 1980s, the dominance of through-hole packaging of integrated circuits (ICs) provided easy access to nearly every pin of every chip on a printed circuit board. Pro...
An open architecture tester allows a third party to develop its own instrument. Such a tester must be open in the sense that it needs to be able to integrate this instrument with ...
The objective of this paper is to present an infrastructure IP (I-IP) designed to characterize yield loss in the process back-end. The I-IP structure is described in using a botto...
Today’s low cost wireless phones have driven a need to be able to economically test high volumes of complex RF IC’s at a fraction of the cost of the IC. In June of 2001 the IB...
This summary of selected microelectromechanical systems (MEMS) processes guides the reader through a wide variety of fabrication techniques used to make micromechanical structures...
This paper describes the implementation of a test pattern language using STIL [1], the IEEE Standard Test Interface Language (1450-1999), in a next generation, open architecture A...
The custom testability strategy of the Alpha 21364, Hewlett-Packard’s most recent Alpha microprocessor, builds upon its Alpha 21264 embedded core. Several additional DFT feature...
Scott Erlanger, Dilip K. Bhavsar, Richard A. Davie...
The IEEE 1149.6 standard was approved in March of 2003. The standard extends the capability of the IEEE 1149.1 standard to include AC-coupled and/or differential nets. These nets ...
Bill Eklow, Carl Barnhart, Mike Ricchetti, Terry B...
Faster defect localization is achieved by combining IC simulations and internal measurements. Time resolved photon emission records photons emitted during commutations (current) r...
Romain Desplats, Felix Beaudoin, Philippe Perdu, N...