ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
Today’s ASIC designs consist of more memory in terms of both area and number of instances. The shrinking of geometries has an even greater effect upon memories due to their tigh...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
In a carefully structured study spanning several months, the authors visited numerous companies focused on Design For Test methodologies in SoC Test, Characterization, and Failure...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
Knowing, that the threshold voltage of the EEPROM memory cells is a key parameter to determine the overall performance of the memory, a build in structure to extract this informat...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper discusses the adoption of Embedded Deterministic Test (EDT) at Infineon Technologies as a means to reduce the cost of manufacturing test without compromising test quali...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper describes a method for automatically generating diagnostic programs for mixed-signal load boards. This procedure employs a statistical method of computing Mahalanobis D...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper we analyze the effects of transient faults (TFs) affecting the internal nodes of conventional latch structures and we propose a new latch design which allows to tole...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
: Empirical analyses of the IDDQ signatures of 0.18 µm devices indicate that IDDQ currents exhibit hysteresis. A newly proposed test method, SPIRIT (Single Pattern Iteration IDDQ ...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
The long term impact of MEMS technology will be in its ability to integrate novel sensing and actuation functionality on traditional computing and communication devices enabling t...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
We propose a procedure for designing an LFSRbased circuit for masking of unknown output values that appear in the output response of a circuit tested using LBIST. The procedure is...
ITC
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper, a new paradigm for designing logic circuits with concurrent error detection (CED) is described. The key idea is to exploit the asymmetric soft error susceptibility ...