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ITC
2003
IEEE
167views Hardware» more  ITC 2003»
14 years 2 months ago
Path Delay Test Generation for Domino Logic Circuits in the Presence of Crosstalk
A technique to derive test vectors that exercise the worstcase delay effects in a domino circuit in the presence of crosstalk is described. A model for characterizing the delay of...
Rahul Kundu, R. D. (Shawn) Blanton
ITC
2003
IEEE
104views Hardware» more  ITC 2003»
14 years 2 months ago
On-line Detection of Faults in Carry-Select Adders
This paper proposes an architecture for implementing a self-checking 4-bit carry select adder that can be extended to any n-bit addition. The overhead is directly proportional to ...
B. Kiran Kumar, Parag K. Lala
ITC
2003
IEEE
106views Hardware» more  ITC 2003»
14 years 2 months ago
Detection of Resistive Shorts in Deep Sub-micron Technologies
Current-based tests are the most effective methods available to detect resistive shorts. Delta IDDQ testing is the most sensitive variant and can handle off-state currents of 10-1...
Bram Kruseman, Stefan van den Oetelaar
ITC
2003
IEEE
126views Hardware» more  ITC 2003»
14 years 2 months ago
Diagnosis-Based Post-Silicon Timing Validation Using Statistical Tools and Methodologies
This paper describes a new post-silicon validation problem for diagnosing systematic timing errors. We illustrate the differences between timing validation and the traditional log...
Angela Krstic, Li-C. Wang, Kwang-Ting Cheng, T. M....
ITC
2003
IEEE
161views Hardware» more  ITC 2003»
14 years 2 months ago
DFFT : Design For Functional Testability
Creating functional tests that work on an ATE has always been a significant challenge [1]. This paper identifies the fundamental mechanisms for functional test failures of an SOC ...
Haluk Konuk, Leon Xiao
ITC
2003
IEEE
124views Hardware» more  ITC 2003»
14 years 2 months ago
Low Contact-Force Fritting Probe Card Using Buckling Microcantilevers
Kenichi Kataoka, Toshihiro Itoh, Tadatomo Suga
ITC
2003
IEEE
157views Hardware» more  ITC 2003»
14 years 2 months ago
Parity-Based Concurrent Error Detection in Symmetric Block Ciphers
Deliberate injection of faults into cryptographic devices is an effective cryptanalysis technique against symmetric and asymmetric encryption. We will describe a general concurren...
Ramesh Karri, Grigori Kuznetsov, Michael Göss...
ITC
2003
IEEE
102views Hardware» more  ITC 2003»
14 years 2 months ago
Evolution of IEEE 1149.1 Addressable Shadow Protocol Devices
This paper describes an Addressable Shadow Protocol device that is capable of providing connectivity between a backplane resident IEEE 1149.1 test bus master and a plurality of 11...
Rakesh N. Joshi, Kenneth L. Williams, Lee Whetsel
ITC
2003
IEEE
115views Hardware» more  ITC 2003»
14 years 2 months ago
Towards Structural Testing of Superconductor Electronics
Many of the semiconductor technologies are already facing limitations while new-generation data and telecommunication systems are implemented. Although in its infancy, superconduc...
Arun A. Joseph, Hans G. Kerkhoff