TCAD
2008
13 years 11 months ago
2008
Manufacturing process variations lead to variability in circuit delay and, if not accounted for, can cause excessive timing yield loss. The familiar traditional approaches to timin...
TCAD
2008
13 years 11 months ago
2008
Abstract--This paper presents a class of power grid analysis and optimization techniques, all of which are based on the algebraic-multigrid (AMG) method. First, a new AMG-based red...
TCAD
2008
13 years 11 months ago
2008
We present in this paper a new interconnect-driven multilevel floorplanner, called interconnect-driven multilevelfloorplanning framework (IMF), to handle large-scale buildingmodule...
TCAD
2008
13 years 11 months ago
2008
el Predicate Abstraction and Refinement Techniques for Verifying RTL Verilog Himanshu Jain, Daniel Kroening, Natasha Sharygina, and Edmund M. Clarke, Fellow, IEEE As a first step, ...
TCAD
2008
13 years 11 months ago
2008
As CMOS technology is scaled down toward the nanoscale regime, drastically growing leakage currents and variations in device characteristics are becoming two important design chall...
TCAD
2008
13 years 11 months ago
2008
Abstract--Quantum circuits are time-dependent diagrams describing the process of quantum computation. Usually, a quantum algorithm must be mapped into a quantum circuit. Optimal sy...
TCAD
2008
13 years 11 months ago
2008
Detecting symmetries has many applications in logic synthesis that include, amongst other things, technology mapping, deciding equivalence of Boolean functions when the input corre...
TCAD
2008
13 years 11 months ago
2008
Abstract--In this paper, we present a postsilicon-tuning technique to improve parametric yield of SRAM array using body bias (BB). First, we show that, although parametric failures...
TCAD
2008
13 years 11 months ago
2008
We present an efficient optimization scheme for gate sizing in the presence of process variations. Our method is a worst-case design scheme, but it reduces the pessimism involved i...